aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/mem-phys-addr.py
diff options
context:
space:
mode:
authorMarcin Wierzbicki <[email protected]>2023-06-26 10:55:32 +0000
committerVinod Koul <[email protected]>2023-07-12 22:27:44 +0530
commita1d12987c38fd97b5e9f266dc849c2d2c6a5bd54 (patch)
tree7cddde71bec5068376ea35526b7395864d42c338 /tools/perf/scripts/python/mem-phys-addr.py
parentd1ea4239a10bf32acb321328e074919fa1eb5468 (diff)
phy: cadence: Sierra: Add single link SGMII register configuration
Add single link SGMII register configuration for no SSC for cdns,sierra-phy-t0 compatibility string. The configuration is based on Sierra Programmer's Guide and validated in Cisco CrayAR SoC. Co-developed-by: Bartosz Wawrzyniak <[email protected]> Signed-off-by: Bartosz Wawrzyniak <[email protected]> Signed-off-by: Marcin Wierzbicki <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions