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| author | Benedikt Niedermayr <[email protected]> | 2022-11-02 14:30:46 +0100 |
|---|---|---|
| committer | Krzysztof Kozlowski <[email protected]> | 2022-11-02 10:02:39 -0400 |
| commit | 89aed3cd5cb951113b766cddd9c2df43cfbdafd5 (patch) | |
| tree | 01edea5ecb86490a53775eded27100f2a5e43df5 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 3821e96a01d658e770074331b56cec88c169a418 (diff) | |
memory: omap-gpmc: wait pin additions
This patch introduces support for setting the wait-pin polarity as well
as using the same wait-pin for different CS regions.
The waitpin polarity can be configured via the WAITPIN<X>POLARITY bits
in the GPMC_CONFIG register. This is currently not supported by the
driver. This patch adds support for setting the required register bits
with the "ti,wait-pin-polarity" dt-property.
The wait-pin can also be shared between different CS regions for special
usecases. Therefore GPMC must keep track of wait-pin allocations, so it
knows that either GPMC itself or another driver has the ownership.
Signed-off-by: Benedikt Niedermayr <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Reviewed-by: Roger Quadros <[email protected]>
Signed-off-by: Krzysztof Kozlowski <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions