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author | Hou Zhiqiang <[email protected]> | 2022-03-11 17:49:36 -0600 |
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committer | Lorenzo Pieralisi <[email protected]> | 2022-04-08 12:35:21 +0100 |
commit | 84f293b204ab1ef519278e7993e9930f03879627 (patch) | |
tree | 2b7915e29d158de8b818d1dd3cef982a913c48ea /tools/perf/scripts/python/mem-phys-addr.py | |
parent | 6c389328c985a3aa8575cf3a573a05c1d121fceb (diff) |
dt-bindings: pci: layerscape-pci: Update the description of SCFG property
Update the description of the second entry of 'fsl,pcie-scfg' property,
as the LS1043A PCIe controller also has some control registers in SCFG
block, while it has 3 controllers.
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Hou Zhiqiang <[email protected]>
Signed-off-by: Lorenzo Pieralisi <[email protected]>
Acked-by: Rob Herring <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions