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| author | Alexandru Ardelean <[email protected]> | 2019-09-26 13:51:42 +0300 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2019-10-15 11:45:49 +0100 |
| commit | 8105936684681195d9073880b06a123b2e316811 (patch) | |
| tree | 4b28c763ded1dc5f7fce400c69bf78f5eb865ac0 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 8e319dd5f1ebbc1fffa9e550b2a643cbce7515b1 (diff) | |
spi: tegra114: change format for `spi_set_cs_timing()` function
The initial version of `spi_set_cs_timing()` was implemented with
consideration only for clock-cycles as delay.
For cases like `CS setup` time, it's sometimes needed that micro-seconds
(or nano-seconds) are required, or sometimes even longer delays, for cases
where the device needs a little longer to start transferring that after CS
is asserted.
Signed-off-by: Alexandru Ardelean <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions