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authorSakari Ailus <[email protected]>2020-09-23 12:22:52 +0200
committerMauro Carvalho Chehab <[email protected]>2020-12-07 17:04:17 +0100
commit7c66f58f1c1fb3181074a09c4aac21a0e8a283f0 (patch)
tree9238973658388fda71f043642e77d406c2486ca3 /tools/perf/scripts/python/mem-phys-addr.py
parent900c33e86e4b53e96e6ea10e9737870e03911a66 (diff)
media: ccs: Add support for DDR OP SYS and OP PIX clocks
Support dual data rate operational system and pixel clocks by conveying the flags to the PLL calculator and updating how the link rate is calculated. Signed-off-by: Sakari Ailus <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]>
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