diff options
| author | Sergiu Moga <[email protected]> | 2022-09-22 14:33:43 +0300 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2022-09-22 16:31:36 +0200 |
| commit | 79cb50350069e080e14ea9e3fff31b31f877261d (patch) | |
| tree | e01ff9c36d3235adc9c07ae5ba872eef3e31a3bf /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 9e1618008064e80dbd2f8aca80a0a3b17b103e70 (diff) | |
dt-bindings: serial: atmel,at91-usart: Add gclk as a possible USART clock
The Devicetree nodes for FLEXCOM's USART can also have an alternative
clock source for the baudrate generator (other than the peripheral
clock), namely the Generick Clock. Thus make the binding aware of
this clock that someone may place in the clock related
properties of the USART node.
Signed-off-by: Sergiu Moga <[email protected]>
Acked-by: Krzysztof Kozlowski <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions