diff options
| author | Sung Lee <[email protected]> | 2020-02-20 15:54:32 -0500 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2020-03-05 00:30:12 -0500 |
| commit | 78fe9f63947a2bf5dedc0ece239211edd777c058 (patch) | |
| tree | 7f154b4ccfe424d6f1be418a2314d1af77942b53 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 7bc3807fe1d0694caf59dec983ac5809441cc9ca (diff) | |
drm/amd/display: Remove DISPCLK Limit Floor for Certain SMU Versions
[WHY]
SMU FW previously had an issue with lowering display clock to below 100
MHz, and a workaround was put in to limit it. Newest SMU FW does not
have this issue, and no longer needs the 100MHz cap.
[HOW]
Remove the 100MHz cap based on the SMU FW version.
Signed-off-by: Sung Lee <[email protected]>
Reviewed-by: Yongqiang Sun <[email protected]>
Acked-by: Rodrigo Siqueira <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions