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authorLeon Romanovsky <[email protected]>2022-12-02 22:14:48 +0200
committerSteffen Klassert <[email protected]>2022-12-08 10:36:05 +0100
commit6b5c45e16e434efc6d323a8bc79e0eba49cd13f2 (patch)
treef345c3230dc900135d8fbdf53c4ced9c0ca7cb26 /tools/perf/scripts/python/mem-phys-addr.py
parent9af594d8a99ef726b5785a309fb230265d16fd8b (diff)
net/mlx5e: Configure IPsec packet offload flow steering
In packet offload mode, the HW is responsible to handle ESP headers, SPI numbers and trailers (ICV) together with different logic for RX and TX paths. In order to support packet offload mode, special logic is added to flow steering rules. Reviewed-by: Raed Salem <[email protected]> Reviewed-by: Saeed Mahameed <[email protected]> Signed-off-by: Leon Romanovsky <[email protected]> Signed-off-by: Steffen Klassert <[email protected]>
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