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authorMinda Chen <[email protected]>2023-06-29 15:51:12 +0800
committerVinod Koul <[email protected]>2023-07-12 22:27:44 +0530
commit69d41115b83905d77474846cbcea91b84bbb7175 (patch)
tree6f14a119a6cd75e286b2d33e4135a840a44195b6 /tools/perf/scripts/python/mem-phys-addr.py
parent2689c9c4ab6006342fce9dd88a0d63a24cf9c05f (diff)
dt-bindings: phy: Add StarFive JH7110 PCIe PHY
Add StarFive JH7110 SoC PCIe 2.0 PHY dt-binding. PCIe PHY0 (phy@10210000) can be used as USB 3.0 PHY. Signed-off-by: Minda Chen <[email protected]> Reviewed-by: Hal Feng <[email protected]> Reviewed-by: Rob Herring <[email protected]> Reviewed-by: Roger Quadros <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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