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| author | Jagan Teki <jagan@amarulasolutions.com> | 2018-09-04 12:40:43 +0800 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-09-05 09:15:26 +0200 |
| commit | 65b1e8a6ca5f5305962daee6af730bd2d210bb0b (patch) | |
| tree | 5d2f79e5796f7690919aa212e013094195db6dfd /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | c2ff8383cc33c2d9c169e4daf1e37a434c3bb420 (diff) | |
clk: sunxi-ng: a64: Add minimal rate for video PLLs
According to documentation and experience with other similar SoCs, video
PLLs don't work stable if their output frequency is set below 192 MHz.
Because of that, set minimal rate to both A64 video PLLs to 192 MHz.
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions