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authorIra Weiny <[email protected]>2022-12-11 23:06:19 -0800
committerDan Williams <[email protected]>2023-01-05 13:31:27 -0800
commit589c3357370a596ef7c99c00baca8ac799fce531 (patch)
tree21c318f378c79bbfb616013bd6d08af0bdb8adda /tools/perf/scripts/python/mem-phys-addr.py
parent4a20bc3e207488064e08fc5d7220d6acf95c80dd (diff)
PCI/CXL: Export native CXL error reporting control
CXL _OSC Error Reporting Control is used by the OS to determine if Firmware has control of various CXL error reporting capabilities including the event logs. Expose the result of negotiating CXL Error Reporting Control in struct pci_host_bridge for consumption by the CXL drivers. Cc: Bjorn Helgaas <[email protected]> Cc: Lukas Wunner <[email protected]> Cc: [email protected] Cc: [email protected] Signed-off-by: Ira Weiny <[email protected]> Acked-by: Bjorn Helgaas <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Reviewed-by: Dan Williams <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Dan Williams <[email protected]>
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