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| author | Felix Fietkau <nbd@nbd.name> | 2023-04-20 22:06:42 +0100 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2023-04-23 13:25:49 +0100 |
| commit | 4eaeca1fc43a4060fa79d7a071572e89181a725e (patch) | |
| tree | 141a49ee01a96bc1522796cf1f62dab16492b396 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | fbc1449d385d65be49a8d164dfd3772f2cb049ae (diff) | |
net: mtk_eth_soc: mediatek: fix ppe flow accounting for v1 hardware
Older chips (like MT7622) use a different bit in ib2 to enable hardware
counter support. Add macros for both and select the appropriate bit.
Fixes: 3fbe4d8c0e53 ("net: ethernet: mtk_eth_soc: ppe: add support for flow accounting")
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions