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authorHeiko Stuebner <[email protected]>2022-05-11 21:29:15 +0200
committerPalmer Dabbelt <[email protected]>2022-05-11 21:36:32 -0700
commit49b290e430d390bacf7d3792d5654fa4b3212926 (patch)
tree39e1bb6c10655454e9f57c16bfc503af2f0c99a4 /tools/perf/scripts/python/mem-phys-addr.py
parente509204acb03785719cda632758b7ac6cd351e28 (diff)
riscv: prevent compressed instructions in alternatives
Instructions are opportunistically compressed by the RISC-V assembler when possible, but in alternatives-blocks both the old and new content need to be the same size, so having the toolchain do somewhat random optimizations will cause strange side-effects like "attempt to move .org backwards" compile-time errors. Already a simple "and" used in alternatives assembly will cause these mismatched code sizes. So prevent compressed instructions to be generated in alternatives- code and use option-push and -pop to only limit this to the relevant code blocks Signed-off-by: Heiko Stuebner <[email protected]> Reviewed-by: Christoph Hellwig <[email protected]> Reviewed-by: Philipp Tomsich <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Palmer Dabbelt <[email protected]>
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