diff options
| author | Ye Li <[email protected]> | 2024-06-07 21:33:35 +0800 |
|---|---|---|
| committer | Abel Vesa <[email protected]> | 2024-06-21 09:35:21 +0300 |
| commit | 4717ccadb51e2630790dddd222830702de17f090 (patch) | |
| tree | 0f9c2ebbcc0a302e692967f69e077c1abd1826cb /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | d342df11726bfac9c3a9d2037afa508ac0e9e44e (diff) | |
clk: imx: composite-7ulp: Check the PCC present bit
When some module is disabled by fuse, its PCC PR bit is default 0 and
PCC is not operational. Any write to this PCC will cause SError.
Fixes: b40ba8065347 ("clk: imx: Update the compsite driver to support imx8ulp")
Reviewed-by: Peng Fan <[email protected]>
Signed-off-by: Ye Li <[email protected]>
Signed-off-by: Peng Fan <[email protected]>
Reviewed-by: Abel Vesa <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Abel Vesa <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions