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authorMarc Zyngier <[email protected]>2023-08-15 19:38:36 +0100
committerMarc Zyngier <[email protected]>2023-08-17 10:00:26 +0100
commit464f2164da7e4cb50faec9d56226b22c9b36cdda (patch)
tree7cc24e0da95e61c50eab3410fe1b05d87353db0c /tools/perf/scripts/python/mem-phys-addr.py
parent21f74a51373791732baa0d672a604afa76d5718d (diff)
arm64: Add missing ERX*_EL1 encodings
We only describe a few of the ERX*_EL1 registers. Add the missing ones (ERXPFGF_EL1, ERXPFGCTL_EL1, ERXPFGCDN_EL1, ERXMISC2_EL1 and ERXMISC3_EL1). Reviewed-by: Eric Auger <[email protected]> Reviewed-by: Miguel Luis <[email protected]> Acked-by: Catalin Marinas <[email protected]> Reviewed-by: Zenghui Yu <[email protected]> Reviewed-by: Jing Zhang <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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