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| author | Matthew Brost <matthew.brost@intel.com> | 2024-08-20 09:16:32 -0700 |
|---|---|---|
| committer | Matthew Brost <matthew.brost@intel.com> | 2024-08-21 19:34:07 -0700 |
| commit | 40520283e0fd11237ed9dfc0991503b3403d5fa4 (patch) | |
| tree | 726485b02a7c5d147132741a299b347600c7742b /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 77cc3f6c58b1b28cee73904946c46a1415187d04 (diff) | |
drm/xe: Invalidate media_gt TLBs in PT code
Testing on LNL has shown media GT's TLBs need to be invalidated via the
GuC, update PT code appropriately.
v2:
- Do dma_fence_get before first call of invalidation_fence_init (Himal)
- No need to check for valid chain fence (Himal)
Fixes: 3330361543fc ("drm/xe/lnl: Add LNL platform definition")
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Himal Prasad Ghimiray <himal.prasad.ghimiray@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20240820161632.987369-1-matthew.brost@intel.com
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions