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authorAndrew Davis <[email protected]>2022-10-17 14:25:28 -0500
committerNishanth Menon <[email protected]>2022-10-28 08:14:48 -0500
commit3e21ec289c76dbc88dc306802122214b6b053a99 (patch)
tree5de9d7a8e4fd83a340b9322f17952421bd317aca /tools/perf/scripts/python/mem-phys-addr.py
parentdcac8eaaa90fe2c84761cf55a3e989ca5774d2f5 (diff)
arm64: dts: ti: k3-am64: Enable PCIe nodes at the board level
PCIe nodes defined in the top-level AM64x SoC dtsi files are incomplete and will not be functional unless they are extended with a SerDes PHY. And usually only one of the two modes can be used at a time as they share a SerDes link. As the PHY and mode is only known at the board integration level, these nodes should only be enabled when provided with this information. Disable the PCIe nodes in the dtsi files and only enable the ones that are actually pinned out on a given board. Signed-off-by: Andrew Davis <[email protected]> Signed-off-by: Nishanth Menon <[email protected]> Reviewed-by: Bryan Brattlof <[email protected]> Acked-by: Vignesh Raghavendra <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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