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authorDaniel Golle <daniel@makrotopia.org>2024-07-01 20:28:14 +0100
committerJakub Kicinski <kuba@kernel.org>2024-07-05 16:58:38 -0700
commit3b2aef99221d395ce37efa426d7b50e7dcd621d6 (patch)
tree1d485e8fef822f840e506cce3410dabbdecf6b67 /tools/perf/scripts/python/mem-phys-addr.py
parentc7f79f2620b7776586c626edf21eb6ed6ed3d1eb (diff)
net: ethernet: mediatek: Allow gaps in MAC allocation
Some devices with MediaTek SoCs don't use the first but only the second MAC in the chip. Especially with MT7981 which got a built-in 1GE PHY connected to the second MAC this is quite common. Make sure to reset and enable PSE also in those cases by skipping gaps using 'continue' instead of aborting the loop using 'break'. Fixes: dee4dd10c79a ("net: ethernet: mtk_eth_soc: ppe: add support for multiple PPEs") Suggested-by: Elad Yifee <eladwf@gmail.com> Signed-off-by: Daniel Golle <daniel@makrotopia.org> Reviewed-by: Przemek Kitszel <przemyslaw.kitszel@intel.com> Link: https://patch.msgid.link/379ae584cea112db60f4ada79c7e5ba4f3364a64.1719862038.git.daniel@makrotopia.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
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