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authorJitao Shi <[email protected]>2022-05-20 10:00:06 +0800
committerChun-Kuang Hu <[email protected]>2022-06-07 07:32:46 +0800
commit39e8d062b03c3dc257d880d82bd55cdd9e185a3b (patch)
tree1182d25a69a9bbfa5c67fb5cd63ee5d0b51bd4fb /tools/perf/scripts/python/mem-phys-addr.py
parentcde7e2e35c2866d22a3a012e72a41052dfcc255d (diff)
drm/mediatek: Keep dsi as LP00 before dcs cmds transfer
To comply with the panel sequence, hold the mipi signal to LP00 before the dcs cmds transmission, and pull the mipi signal high from LP00 to LP11 until the start of the dcs cmds transmission. The normal panel timing is : (1) pp1800 DC pull up (2) avdd & avee AC pull high (3) lcm_reset pull high -> pull low -> pull high (4) Pull MIPI signal high (LP11) -> initial code -> send video data (HS mode) The power-off sequence is reversed. If dsi is not in cmd mode, then dsi will pull the mipi signal high in the mtk_output_dsi_enable function. The delay in lane_ready func is the reaction time of dsi_rx after pulling up the mipi signal. Fixes: 2dd8075d2185 ("drm/mediatek: mtk_dsi: Use the drm_panel_bridge API") Link: https://patchwork.kernel.org/project/linux-mediatek/patch/[email protected]/ Cc: <[email protected]> # 5.10.x: 7f6335c6a258: drm/mediatek: Modify dsi funcs to atomic operations Cc: <[email protected]> # 5.10.x: cde7e2e35c28: drm/mediatek: Separate poweron/poweroff from enable/disable and define new funcs Cc: <[email protected]> # 5.10.x Signed-off-by: Jitao Shi <[email protected]> Signed-off-by: Xinlei Lee <[email protected]> Reviewed-by: AngeloGioacchino Del Regno <[email protected]> Reviewed-by: Rex-BC Chen <[email protected]> Signed-off-by: Chun-Kuang Hu <[email protected]>
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