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| author | Pin-yen Lin <treapking@chromium.org> | 2024-03-15 19:16:02 +0800 |
|---|---|---|
| committer | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2024-04-03 10:05:26 +0200 |
| commit | 374a7c6400e314458178255a63c37d6347845092 (patch) | |
| tree | f54651c0ac46be459697c59a7333799c50f47c61 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | 17b33dd9e4a38fbaca87c68e532b52f9d0492ba7 (diff) | |
arm64: dts: mediatek: mt8192-asurada: Update min voltage constraint for MT6315
Update the minimum voltage from 300000 uV to 400000 uV so it matches
the MT6315 datasheet.
Also update the minimum voltage for Vgpu regulator from 606250 uV to
400000 uV because the requested voltage could be lower than the minimum
voltage on the GPU OPP table when the MTK Smart Voltage Scaling (SVS)
driver is enabled.
Fixes: 3183cb62b033 ("arm64: dts: mediatek: asurada: Add SPMI regulators")
Signed-off-by: Pin-yen Lin <treapking@chromium.org>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240315111621.2263159-2-treapking@chromium.org
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions