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authorAlvin Lee <[email protected]>2022-07-12 15:49:19 -0400
committerAlex Deucher <[email protected]>2022-07-25 17:15:06 -0400
commit319568d75f5f91cd4f362b26e65af2a4437c64bf (patch)
treef7ef914ccd7b3b3dec4851da19faff8dceb43a37 /tools/perf/scripts/python/mem-phys-addr.py
parent2ce0b2186c057a54a4d980b296bd1659d0091716 (diff)
drm/amd/display: Updates SubVP and SubVP DRR cases
[Description] - For any DRR cases in SubVP, don't lock for VSYNC flips - For DCN32/321 use FW to do DRR manual trigger programming - Add bit in SubVP cmd to indicate if the SubVP pipe is DRR Reviewed-by: Jun Lei <[email protected]> Acked-by: Alex Hung <[email protected]> Signed-off-by: Alvin Lee <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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