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author | Piyush Mehta <[email protected]> | 2023-06-13 19:32:50 +0530 |
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committer | Vinod Koul <[email protected]> | 2023-07-12 22:27:42 +0530 |
commit | 25d70083351318b44ae699d92c042dcb18a738ea (patch) | |
tree | 71928bab9ecdd72b10000bc77ccd7df7b7fddaa6 /tools/perf/scripts/python/mem-phys-addr.py | |
parent | b3db66f624468ab4a0385586bc7f4221e477d6b2 (diff) |
phy: xilinx: phy-zynqmp: dynamic clock support for power-save
Enabling clock for all the lanes consumes power even PHY is active or
inactive. To resolve this, enable/disable clocks in phy_init/phy_exit.
By default clock is disabled for all the lanes. Whenever phy_init called
from USB, SATA, or display driver, etc. It enabled the required clock
for requested lane. On phy_exit cycle, it disabled clock for the active
PHYs.
During the suspend/resume cycle, each USB/ SATA/ display driver called
phy_exit/phy_init individually. It disabled clock on exit, and enabled
on initialization for the active PHYs.
Signed-off-by: Piyush Mehta <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions