diff options
| author | Chris Park <[email protected]> | 2022-09-12 22:36:49 +0800 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-09-19 15:08:12 -0400 |
| commit | 16e5859d9faee7b839531e7cb8f4e98954108c75 (patch) | |
| tree | f3ea606cba9d7c79938c0a5d5ebc35837886f2af /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | db62b2b7893f724e5032229443b03e0494856aef (diff) | |
drm/amd/display: Port DCN30 420 logic to DCN32
[Why]
420 modes are limited by FMT buffer width of 4096
which requires multi-pipe support in form of ODM
combine. If 420 modes have greater HActive than
4096, the DML logic should accomodate whether
it should be rejected, or ODM combine 2:1 or 4:1
is triggered accordingly.
[How]
FMT Buffer limit of 4096 in DCN32. Force ODM
combine depending on HActive and FMT Buffer limit.
Reject modes if TMDS 420 and above 4096.
Acked-by: Wayne Lin <[email protected]>
Signed-off-by: Chris Park <[email protected]>
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions