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author | Heiko Stuebner <heiko@sntech.de> | 2022-05-11 21:29:17 +0200 |
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committer | Palmer Dabbelt <palmer@rivosinc.com> | 2022-05-11 21:36:32 -0700 |
commit | 100631b48ded73fcd8fdd7e17139cda92dfbfb79 (patch) | |
tree | 1cdb9547e66c18b542591bcce0795bd3fd714522 /tools/perf/scripts/python/mem-phys-addr.py | |
parent | ffb0b0afbd7c2608b6608d693569f0e726efd26b (diff) |
riscv: Fix accessing pfn bits in PTEs for non-32bit variants
On rv32 the PFN part of PTEs is defined to use bits [xlen-1:10]
while on rv64 it is defined to use bits [53:10], leaving [63:54]
as reserved.
With upcoming optional extensions like svpbmt these previously
reserved bits will get used so simply right-shifting the PTE
to get the PFN won't be enough.
So introduce a _PAGE_PFN_MASK constant to mask the correct bits
for both rv32 and rv64 before shifting.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
Link: https://lore.kernel.org/r/20220511192921.2223629-9-heiko@sntech.de
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions