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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-04-22 00:32:08 +0200 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2023-05-08 11:23:53 -0700 |
| commit | 0709e55ed13e256994e440a4e0d62dc1cf3fc6a3 (patch) | |
| tree | 3defd6dc4f9d5379df5785d5c50bf53619b536f2 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | ac9a78681b921877518763ba0e89202254349d1b (diff) | |
arm64: dts: broadcom: add missing cache properties
As all level 2 and level 3 caches are unified, add required
cache-unified properties to fix warnings like:
bcm94908.dtb: l2-cache0: 'cache-unified' is a required property
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: William Zhang <william.zhang@broadcom.com>
Link: https://lore.kernel.org/r/20230421223208.115555-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions