diff options
| author | Matt Roper <[email protected]> | 2020-10-06 17:22:08 -0700 |
|---|---|---|
| committer | Lucas De Marchi <[email protected]> | 2020-10-07 13:51:23 -0700 |
| commit | 0642c2b837495b6c6b60349c0e4e1b4fe2bedc0a (patch) | |
| tree | 6802f83684ae774bd30a5f1ddaa9e4cf7cf5c712 /tools/perf/scripts/python/mem-phys-addr.py | |
| parent | fb7318c37afac6c6c7d18f893b3df962388cf763 (diff) | |
drm/i915/dg1: Don't program PHY_MISC for PHY-C and PHY-D
The only bit we use in PHY_MISC is DE_IO_COMP_PWR_DOWN, and the bspec
details for that bit tell us that it need only be set for PHY-A and
PHY-B. It also turns out that there isn't even an instance of the
PHY_MISC register for PHY-D on this platform. Let's extend the EHL/RKL
logic that conditionally skips PHY_MISC usage to DG1 as well.
Bspec: 50107
Cc: Aditya Swarup <[email protected]>
Cc: Clinton Taylor <[email protected]>
Signed-off-by: Matt Roper <[email protected]>
Signed-off-by: Lucas De Marchi <[email protected]>
Reviewed-by: Anusha Srivatsa <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions