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author | Dmitry Baryshkov <[email protected]> | 2023-01-27 01:03:19 +0200 |
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committer | Bjorn Andersson <[email protected]> | 2023-02-08 14:31:52 -0800 |
commit | 027726365906fc863265635e545d063a45807fe8 (patch) | |
tree | 6bcc94ab7a3374a2a14a2c786f4e80aa6ff6422a /tools/perf/scripts/python/mem-phys-addr.py | |
parent | d4cb3e7113f82f7378527890aa7b4006234665fe (diff) |
clk: qcom: add the driver for the MSM8996 APCS clocks
Add a simple driver handling the APCS clocks on MSM8996. For now it
supports just a single aux clock, linking GPLL0 to CPU and CBF clocks.
Note, there is little sense in registering sys_apcs_aux as a child of
gpll0. The PLL is always-on. And listing the gpll0 as a property of the
apcs would delay its probing until the GCC has been probed (while we
would like for the apcs to be probed as early as possible).
Signed-off-by: Dmitry Baryshkov <[email protected]>
Reviewed-by: Konrad Dybcio <[email protected]>
[bjorn: Fixed spelling of register, per Stephen's feedback]
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/mem-phys-addr.py')
0 files changed, 0 insertions, 0 deletions