aboutsummaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/libxed.py
diff options
context:
space:
mode:
authorGreg Kroah-Hartman <[email protected]>2022-03-18 12:49:10 +0100
committerGreg Kroah-Hartman <[email protected]>2022-03-18 12:49:10 +0100
commit6aec3bfe38e37363e32e5cf20ceb2ea0c4f99672 (patch)
tree144e7d6044a7e64b6eeeffc37c5867014e6311f8 /tools/perf/scripts/python/libxed.py
parentcc6ce5ac2c998d7e869d7289736e0097ce7d2ad1 (diff)
parent286f950545e0d9c8aa802cbfc9676860bbc49179 (diff)
Merge tag 'coresight-next-v5.18-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux into char-misc-next
Suzuki writes: coresight: changes for v5.18 The coresight update for v5.18 includes - TRBE erratum workarounds for Arm Cortex-A510 - Fixes for leaking root namespace PIDs into non-root namespace trace sessions - Miscellaneous fixes and cleanups Updated tag to reflect missing committer s-o-b tags. Signed-off-by: Suzuki K Poulose <[email protected]> * tag 'coresight-next-v5.18-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux: coresight: Drop unused 'none' enum value for each component coresight: etm3x: Don't trace PID for non-root PID namespace coresight: etm4x: Don't trace PID for non-root PID namespace coresight: etm4x: Don't use virtual contextID for non-root PID namespace coresight: etm4x: Add lock for reading virtual context ID comparator coresight: trbe: Move check for kernel page table isolation from EL0 to probe coresight: no-op refactor to make INSTP0 check more idiomatic hwtracing: coresight: Replace acpi_bus_get_device() coresight: syscfg: Fix memleak on registration failure in cscfg_create_device coresight: Fix TRCCONFIGR.QE sysfs interface coresight: trbe: Work around the trace data corruption coresight: trbe: Work around the invalid prohibited states coresight: trbe: Work around the ignored system register writes
Diffstat (limited to 'tools/perf/scripts/python/libxed.py')
0 files changed, 0 insertions, 0 deletions