diff options
| author | Pablo Sun <pablo.sun@mediatek.com> | 2022-09-19 18:56:00 +0200 |
|---|---|---|
| committer | Chen-Yu Tsai <wenst@chromium.org> | 2022-09-26 13:26:20 +0800 |
| commit | 3dfe6e17c97b16971619b53c2cc79185c7f8b9aa (patch) | |
| tree | caa265d91715e33a9e28548a88d14f2c6a245c4e /tools/perf/scripts/python/libxed.py | |
| parent | 879b752b97f12b678978e17f57316641ef0f2aa0 (diff) | |
clk: mediatek: add VDOSYS1 clock
Add the clock gate definition for the DPI1 hardware
in VDOSYS1.
The parent clock "hdmi_txpll" is already defined in
`mt8195.dtsi`.
Signed-off-by: Pablo Sun <pablo.sun@mediatek.com>
Signed-off-by: Guillaume Ranquet <granquet@baylibre.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Link: https://lore.kernel.org/r/20220919-v1-2-4844816c9808@baylibre.com
Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>
Diffstat (limited to 'tools/perf/scripts/python/libxed.py')
0 files changed, 0 insertions, 0 deletions