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authorMark Brown <[email protected]>2023-07-13 01:13:46 +0100
committerMark Brown <[email protected]>2023-07-18 14:45:32 +0100
commitd643047ec77ed17fef7b2ce76ecd5e88b3b5f7d8 (patch)
tree33cb245890ae3b01e187ed1f03cad40cc8f55a93 /tools/perf/scripts/python/intel-pt-events.py
parent11e1354036391054f496aa4c4e724e160dfcded2 (diff)
ASoC: wm8961: Update to use maple tree register cache
The maple tree register cache is based on a much more modern data structure than the rbtree cache and makes optimisation choices which are probably more appropriate for modern systems than those made by the rbtree cache. In v6.5 it has also acquired the ability to generate multi-register writes in sync operations, bringing performance up to parity with the rbtree cache there. Update the wm8961 driver to use the more modern data structure. Acked-by: Charles Keepax <[email protected]> Signed-off-by: Mark Brown <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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