diff options
| author | Chris Wilson <[email protected]> | 2020-11-26 14:08:41 +0000 |
|---|---|---|
| committer | Chris Wilson <[email protected]> | 2020-11-26 14:17:50 +0000 |
| commit | 977933b5da7c16f39295c4c1d4259a58ece65dbe (patch) | |
| tree | 24eccea5dfac399b534603cbc6ae6653c169d841 /tools/perf/scripts/python/intel-pt-events.py | |
| parent | 2f87c053ac489309c04b51f788e2b4f13a737ca9 (diff) | |
drm/i915/gt: Program mocs:63 for cache eviction on gen9
Ville noticed that the last mocs entry is used unconditionally by the HW
when it performs cache evictions, and noted that while the value is not
meant to be writable by the driver, we should program it to a reasonable
value nevertheless.
As it turns out, we can change the value of mocs:63 and the value we
were programming into it would cause hard hangs in conjunction with
atomic operations.
v2: Add details from bspec about how it is used by HW
Suggested-by: Ville Syrjälä <[email protected]>
Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2707
Fixes: 3bbaba0ceaa2 ("drm/i915: Added Programming of the MOCS")
Signed-off-by: Chris Wilson <[email protected]>
Cc: Ville Syrjälä <[email protected]>
Cc: Jason Ekstrand <[email protected]>
Cc: <[email protected]> # v4.3+
Reviewed-by: Ville Syrjälä <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
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