diff options
author | Yixun Lan <[email protected]> | 2022-07-06 22:02:04 +0800 |
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committer | Daniel Borkmann <[email protected]> | 2022-07-07 16:30:04 +0200 |
commit | 935dc35c75318fa213d26808ad8bb130fb0b486e (patch) | |
tree | a08d93b255d31697a42625aa794cf10c322fc221 /tools/perf/scripts/python/intel-pt-events.py | |
parent | 7c8121af1bfe29feedfa4fcb3154886660ecbe3a (diff) |
libbpf, riscv: Use a0 for RC register
According to the RISC-V calling convention register usage here [0], a0
is used as return value register, so rename it to make it consistent
with the spec.
[0] section 18.2, table 18.2
https://riscv.org/wp-content/uploads/2015/01/riscv-calling.pdf
Fixes: 589fed479ba1 ("riscv, libbpf: Add RISC-V (RV64) support to bpf_tracing.h")
Signed-off-by: Yixun Lan <[email protected]>
Signed-off-by: Daniel Borkmann <[email protected]>
Acked-by: Björn Töpel <[email protected]>
Acked-by: Amjad OULED-AMEUR <[email protected]>
Link: https://lore.kernel.org/bpf/[email protected]
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
0 files changed, 0 insertions, 0 deletions