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authorAnshuman Khandual <[email protected]>2021-06-15 15:02:58 +0530
committerWill Deacon <[email protected]>2021-06-15 19:03:24 +0100
commit9163f01130304fab1f74683d7d44632da7bda637 (patch)
treee3d561784e3a287c37e4b75e716d39b97c63417e /tools/perf/scripts/python/intel-pt-events.py
parent84c5e23edecd7013ceaed8460deed5c33842cb8d (diff)
arm64/mm: Fix ttbr0 values stored in struct thread_info for software-pan
When using CONFIG_ARM64_SW_TTBR0_PAN, a task's thread_info::ttbr0 must be the TTBR0_EL1 value used to run userspace. With 52-bit PAs, the PA must be packed into the TTBR using phys_to_ttbr(), but we forget to do this in some of the SW PAN code. Thus, if the value is installed into TTBR0_EL1 (as may happen in the uaccess routines), this could result in UNPREDICTABLE behaviour. Since hardware with 52-bit PA support almost certainly has HW PAN, which will be used in preference, this shouldn't be a practical issue, but let's fix this for consistency. Cc: Catalin Marinas <[email protected]> Cc: Will Deacon <[email protected]> Cc: Mark Rutland <[email protected]> Cc: James Morse <[email protected]> Cc: [email protected] Cc: [email protected] Fixes: 529c4b05a3cb ("arm64: handle 52-bit addresses in TTBR") Signed-off-by: Anshuman Khandual <[email protected]> Reviewed-by: Catalin Marinas <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Will Deacon <[email protected]>
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