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authorSamuel Holland <[email protected]>2022-11-13 20:21:13 -0600
committerVinod Koul <[email protected]>2022-11-24 23:04:24 +0530
commit4d0c2165e64eec00c19b68b1abc83e57e9633db9 (patch)
tree836ee05159d2fb68c29856f1c6ba46c547fc573a /tools/perf/scripts/python/intel-pt-events.py
parent3fd490a7197857dc3aa409e56e31deaeab097c5f (diff)
phy: allwinner: phy-sun6i-mipi-dphy: Add the A100 DPHY variant
A100 features an updated DPHY, which moves PLL control inside the DPHY register space (previously the PLL was controlled from the CCU). It also requires a modified analog power-on sequence. This "combo PHY" can also be used as an LVDS PHY, but that is not yet supported by the driver. Signed-off-by: Samuel Holland <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
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