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authorMadhumitha Tolakanahalli Pradeep <[email protected]>2022-09-13 11:33:41 -0700
committerRadhakrishna Sripada <[email protected]>2022-09-14 15:05:49 -0700
commit4aaa1a98331c9f9fd31f4b80b913c8f0c556c90a (patch)
tree80ac7217aaddf7ff380dd8e12994902717ad86d1 /tools/perf/scripts/python/intel-pt-events.py
parent851d635a0bf2a741d0e57889b5defcdf9ebfc70e (diff)
drm/i915/mtl: Update CHICKEN_TRANS* register addresses
In Display version 14, Transcoder Chicken Registers have updated address. This patch performs checks to use the right register when required. v2: Omit display version check in i915_reg.h(Jani) v3: - Remove extra whitespace introduced - Fix reg definitions for MTL_CHICKEN_TRANS(MattR) Bspec: 34387, 50054 Cc: Jani Nikula <[email protected]> Cc: Matt Roper <[email protected]> Signed-off-by: Madhumitha Tolakanahalli Pradeep <[email protected]> Signed-off-by: Radhakrishna Sripada <[email protected]> Reviewed-by: Matt Roper <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
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