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authorAnup Patel <anup.patel@wdc.com>2021-09-27 17:10:00 +0530
committerPaolo Bonzini <pbonzini@redhat.com>2021-10-04 04:54:55 -0400
commit3f2401f47d29d669e2cb137709d10dd4c156a02f (patch)
tree0b06fc2f5be51b88022ebb50315f3a587a2370cb /tools/perf/scripts/python/intel-pt-events.py
parent2353e593a13ba76c82921940471ce442fe498927 (diff)
RISC-V: Add hypervisor extension related CSR defines
This patch adds asm/kvm_csr.h for RISC-V hypervisor extension related defines. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Alexander Graf <graf@amazon.com> Message-Id: <20210927114016.1089328-2-anup.patel@wdc.com> Acked-by: Palmer Dabbelt <palmerdabbelt@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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