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| author | Marijn Suijten <marijn.suijten@somainline.org> | 2022-10-26 20:28:17 +0200 |
|---|---|---|
| committer | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2022-11-04 17:39:41 +0300 |
| commit | 1e8196103bd02a396b45c8f6188541634a47fce2 (patch) | |
| tree | 4cc5d2684bff8d42652d1c9845d919f8ae3a32a8 /tools/perf/scripts/python/intel-pt-events.py | |
| parent | 170ffca836dd9f1a0219c4f67554d408fa2b5912 (diff) | |
drm/msm/dsi: Use DIV_ROUND_UP instead of conditional increment on modulo
This exact same math is used to compute bytes_in_slice above in
dsi_update_dsc_timing(), also used to fill slice_chunk_size.
Fixes: b9080324d6ca ("drm/msm/dsi: add support for dsc data")
Reviewed-by: Abhinav Kumar <quic_abhinavk@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Patchwork: https://patchwork.freedesktop.org/patch/508935/
Link: https://lore.kernel.org/r/20221026182824.876933-4-marijn.suijten@somainline.org
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
0 files changed, 0 insertions, 0 deletions