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authorMarcus Carlberg <[email protected]>2022-08-22 16:41:36 +0200
committerJakub Kicinski <[email protected]>2022-08-26 16:30:55 -0700
commit1d2577ab0f052375379fa112d1aa34dbb4ef1463 (patch)
treed67a3c927462fbe0f4e77c141e46b69e7a041ace /tools/perf/scripts/python/intel-pt-events.py
parent44387d1736c40a74085be354e2b5f37ca0689608 (diff)
net: dsa: mv88e6xxx: support RGMII cmode
Since the probe defaults all interfaces to the highest speed possible (10GBASE-X in mv88e6393x) before the phy mode configuration from the devicetree is considered it is currently impossible to use port 0 in RGMII mode. This change will allow RGMII modes to be configurable for port 0 enabling port 0 to be configured as RGMII as well as serial depending on configuration. Signed-off-by: Marcus Carlberg <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
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