diff options
author | Dmitry Korotin <[email protected]> | 2019-06-24 19:05:27 +0000 |
---|---|---|
committer | Paul Burton <[email protected]> | 2019-06-24 13:43:12 -0700 |
commit | 0b24cae4d535045f4c9e177aa228d4e97bad212c (patch) | |
tree | fb104008612d1a6331f236194d76b5cb0ef55b79 /tools/perf/scripts/python/intel-pt-events.py | |
parent | 637dfa0fad6d91a9a709dc70549a6d20fa77f615 (diff) |
MIPS: Add missing EHB in mtc0 -> mfc0 sequence.
Add a missing EHB (Execution Hazard Barrier) in mtc0 -> mfc0 sequence.
Without this execution hazard barrier it's possible for the value read
back from the KScratch register to be the value from before the mtc0.
Reproducible on P5600 & P6600.
The hazard is documented in the MIPS Architecture Reference Manual Vol.
III: MIPS32/microMIPS32 Privileged Resource Architecture (MD00088), rev
6.03 table 8.1 which includes:
Producer | Consumer | Hazard
----------|----------|----------------------------
mtc0 | mfc0 | any coprocessor 0 register
Signed-off-by: Dmitry Korotin <[email protected]>
[[email protected]:
- Commit message tweaks.
- Add Fixes tags.
- Mark for stable back to v3.15 where P5600 support was introduced.]
Signed-off-by: Paul Burton <[email protected]>
Fixes: 3d8bfdd03072 ("MIPS: Use C0_KScratch (if present) to hold PGD pointer.")
Fixes: 829dcc0a956a ("MIPS: Add MIPS P5600 probe support")
Cc: [email protected]
Cc: [email protected] # v3.15+
Diffstat (limited to 'tools/perf/scripts/python/intel-pt-events.py')
0 files changed, 0 insertions, 0 deletions