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authorDan Williams <[email protected]>2024-10-25 12:32:55 -0700
committerIra Weiny <[email protected]>2024-10-25 16:06:49 -0500
commit6575b268157f37929948a8d1f3bafb3d7c055bc1 (patch)
tree097fc7c2a18e7bdebeec0261e8f7db953c095637 /tools/perf/scripts/python/gecko.py
parent53ab8678e7180834be29cf56cd52825fc3427c02 (diff)
cxl/port: Fix CXL port initialization order when the subsystem is built-in
When the CXL subsystem is built-in the module init order is determined by Makefile order. That order violates expectations. The expectation is that cxl_acpi and cxl_mem can race to attach. If cxl_acpi wins the race, cxl_mem will find the enabled CXL root ports it needs. If cxl_acpi loses the race it will retrigger cxl_mem to attach via cxl_bus_rescan(). That flow only works if cxl_acpi can assume ports are enabled immediately upon cxl_acpi_probe() return. That in turn can only happen in the CONFIG_CXL_ACPI=y case if the cxl_port driver is registered before cxl_acpi_probe() runs. Fix up the order to prevent initialization failures. Ensure that cxl_port is built-in when cxl_acpi is also built-in, arrange for Makefile order to resolve the subsys_initcall() order of cxl_port and cxl_acpi, and arrange for Makefile order to resolve the device_initcall() (module_init()) order of the remaining objects. As for what contributed to this not being found earlier, the CXL regression environment, cxl_test, builds all CXL functionality as a module to allow to symbol mocking and other dynamic reload tests. As a result there is no regression coverage for the built-in case. Reported-by: Gregory Price <[email protected]> Closes: http://lore.kernel.org/[email protected] Tested-by: Gregory Price <[email protected]> Fixes: 8dd2bc0f8e02 ("cxl/mem: Add the cxl_mem driver") Cc: [email protected] Cc: Davidlohr Bueso <[email protected]> Cc: Jonathan Cameron <[email protected]> Cc: Dave Jiang <[email protected]> Cc: Alison Schofield <[email protected]> Cc: Vishal Verma <[email protected]> Cc: Ira Weiny <[email protected]> Reviewed-by: Jonathan Cameron <[email protected]> Reviewed-by: Ira Weiny <[email protected]> Tested-by: Alejandro Lucero <[email protected]> Reviewed-by: Alejandro Lucero <[email protected]> Signed-off-by: Dan Williams <[email protected]> Link: https://patch.msgid.link/172988474904.476062.7961350937442459266.stgit@dwillia2-xfh.jf.intel.com Signed-off-by: Ira Weiny <[email protected]>
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