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| author | Shyam Sundar S K <[email protected]> | 2024-11-14 16:32:39 +0530 |
|---|---|---|
| committer | Alexandre Belloni <[email protected]> | 2024-11-18 14:27:29 +0100 |
| commit | 473d0cb485876b29b71da34a0ea4b36e496cb1ea (patch) | |
| tree | 83c88f17ada29d8910d9e3ce239b128c4664702c /tools/perf/scripts/python/gecko.py | |
| parent | 0a0d851ce1bc3f0dc0cdfc429c3b0a9ed6e9272e (diff) | |
i3c: dw: Add quirk to address OD/PP timing issue on AMD platform
The AMD Legacy I3C is having a problem with its IP, specifically with the
push-pull and open-drain pull-up registers. These registers need to be
manually programmed for every CCC submission to align with the duty cycle.
Therefore, add a quirk to address this issue.
Reviewed-by: Jarkko Nikula <[email protected]>
Co-developed-by: Sanket Goswami <[email protected]>
Signed-off-by: Sanket Goswami <[email protected]>
Signed-off-by: Shyam Sundar S K <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Alexandre Belloni <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/gecko.py')
0 files changed, 0 insertions, 0 deletions