diff options
| author | Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com> | 2023-10-28 01:20:52 +0530 |
|---|---|---|
| committer | Matt Roper <matthew.d.roper@intel.com> | 2023-11-01 15:57:13 -0700 |
| commit | 43dea469e99b10ecc967a3576e50a5d416daf13c (patch) | |
| tree | ef310e7fd18338abe28ad93d23257c1dc5c3bc49 /tools/perf/scripts/python/gecko.py | |
| parent | 2fb771f3b840ff59e593dad9b6289276ea545698 (diff) | |
drm/i915/mtl: Add Wa_14019821291
This workaround is primarily implemented by the BIOS. However if the
BIOS applies the workaround it will reserve a small piece of our DSM
(which should be at the top, right below the WOPCM); we just need to
keep that region reserved so that nothing else attempts to re-use it.
v2: Declare regs in intel_gt_regs.h (Matt Roper)
v3: Shift WA implementation before calculation of *base (Matt Roper)
v4:
- Change condition gscpmi base to be fall in DSM range.(Matt Roper)
Signed-off-by: Dnyaneshwar Bhadane <dnyaneshwar.bhadane@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231027195052.3676632-1-dnyaneshwar.bhadane@intel.com
Diffstat (limited to 'tools/perf/scripts/python/gecko.py')
0 files changed, 0 insertions, 0 deletions