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authorJiaxin Yu <[email protected]>2019-08-05 12:56:37 +0800
committerMark Brown <[email protected]>2019-08-15 15:04:04 +0100
commitccb1fa21ef58a2ac15519bb878470762e967e8b3 (patch)
tree70c391ee3ae6a73ef3c52652cc91d22c441a1308 /tools/perf/scripts/python/futex-contention.py
parentd59170b42610c7cbc6e96431ca8357a8bdbf592b (diff)
ASoC: mediatek: mt6358: add delay after dmic clock on
Most dmics produce a high level when they receive clock. The difference between power-on and memory record time is about 10ms, but the dmic needs 50ms to output normal data. This commit add 100ms delay after SoC output clock so that we can cut off the pop noise at the beginning. Signed-off-by: Jiaxin Yu <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Mark Brown <[email protected]>
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