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| author | Vitaly Gaiduk <[email protected]> | 2019-09-09 20:19:24 +0300 |
|---|---|---|
| committer | David S. Miller <[email protected]> | 2019-09-11 23:37:35 +0100 |
| commit | 507ddd5c0d47ad869f361c71d700ffe7f12d1dd6 (patch) | |
| tree | c7bde313c5db5c05dd9e3966272f5ad10b791d2e /tools/perf/scripts/python/futex-contention.py | |
| parent | a2111c460c0c6b046b9965b37084098ff8254349 (diff) | |
net: phy: dp83867: Add SGMII mode type switching
This patch adds ability to switch beetween two PHY SGMII modes.
Some hardware, for example, FPGA IP designs may use 6-wire mode
which enables differential SGMII clock to MAC.
Signed-off-by: Vitaly Gaiduk <[email protected]>
Signed-off-by: David S. Miller <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/futex-contention.py')
0 files changed, 0 insertions, 0 deletions