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authorAthira Rajeev <[email protected]>2022-06-10 19:10:54 +0530
committerMichael Ellerman <[email protected]>2022-06-29 08:57:43 +1000
commit9258c0aa755fac469869dd647a6c3d5299ff7725 (patch)
tree146f3839b833dbeb40feae86fa8af1b09853f87e /tools/perf/scripts/python/flamegraph.py
parent0a110a4b69dacc30ce4f6c10c0396bd2fd097831 (diff)
selftests/powerpc/pmu: Add selftest for group constraint check for PMC5 and PMC6
Events using Performance Monitor Counter 5 (PMC5) and Performance Monitor Counter 6 (PMC6) can't have other fields in event code like cache bits, thresholding or marked bit. PMC5 and PMC6 only supports base events: ie 500fa and 600f4. Other combinations should fail. Testcase tries setting other bits in event code for 500fa and 600f4 to check this scenario. Signed-off-by: Athira Rajeev <[email protected]> Signed-off-by: Michael Ellerman <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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