MIPS: Malta: Enable magic multipliers for Super I/O UARTs

The SMSC FDC37M817 Super I/O chip has a configuration feature that lets
it support special UART divisor values of 32770 and 32769 for bit rates
of 230400 and 460800 bits per second respectively.  Our 8250 driver core
provides support for these special divisors via the UPF_MAGIC_MULTIPLIER
flag, and YAMON firmware unconditionally configures the Super I/O chip
with these divisors enabled as well, so all we need to do in platform
setup for these bit rates to work is to set the flag.

Signed-off-by: Maciej W. Rozycki <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Greg Kroah-Hartman <[email protected]>

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