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authorJonathan Cameron <[email protected]>2022-05-08 18:55:50 +0100
committerJonathan Cameron <[email protected]>2022-06-14 11:53:12 +0100
commit4e2008429588b857bbc13d048b67b931a8d84816 (patch)
tree32062d2a709a7f42d31b99f5b9b2f5fe1faf1f54 /tools/perf/scripts/python/flamegraph.py
parentb990cdfe7536a8da7e134d516350402981300016 (diff)
iio: adc: ad7280a: Fix alignment for DMA safety
____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 003f1d48de52 ("staging:iio:adc:ad7280a: Split buff[2] into tx and rx parts") Signed-off-by: Jonathan Cameron <[email protected]> Acked-by: Nuno Sá <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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