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authorPaul Hsieh <[email protected]>2024-05-28 14:36:00 +0800
committerAlex Deucher <[email protected]>2024-06-14 16:17:16 -0400
commitfc6d61ad1dc7dda7b32f1d1c08d0e6e372cda628 (patch)
tree6786964f631911dce8f730a08604f54db3925ec1 /tools/perf/scripts/python/failed-syscalls-by-pid.py
parent6b3cc7a357db3b6c2a0166c8c81c0a5e723743ae (diff)
drm/amd/display: change dram_clock_latency to 34us for dcn35
[Why & How] Current DRAM setting would cause underflow on customer platform. Modify dram_clock_change_latency_us from 11.72 to 34.0 us as per recommendation from HW team Reviewed-by: Nicholas Kazlauskas <[email protected]> Acked-by: Zaeem Mohamed <[email protected]> Signed-off-by: Paul Hsieh <[email protected]> Tested-by: Daniel Wheeler <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
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