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author | Peter De Schrijver <[email protected]> | 2017-07-25 13:34:05 +0300 |
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committer | Stephen Boyd <[email protected]> | 2017-08-23 15:59:06 -0700 |
commit | e34e69cc866a26ec42be789a49ea6174ddc801ca (patch) | |
tree | f4dc12bcf1e2e3c31826720e8688b5e0eeb413b8 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
parent | 030999fe514d2d6dbabf0ed6727f4c493082d99d (diff) |
clk: tegra210: remove non-existing VFIR clock
Signed-off-by: Peter De Schrijver <[email protected]>
Tested-by: Thierry Reding <[email protected]>
Acked-by: Thierry Reding <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions