diff options
| author | Sonika Jindal <[email protected]> | 2015-02-21 11:12:13 +0530 |
|---|---|---|
| committer | Daniel Vetter <[email protected]> | 2015-03-17 22:29:57 +0100 |
| commit | c3346ef688b9956003cd357fef0a2b8c06e72ee8 (patch) | |
| tree | d8cdeffca6910fa6ee0bcc1f402b7a1bcb9fc250 /tools/perf/scripts/python/failed-syscalls-by-pid.py | |
| parent | a8f3ef6197979824ee117d89a26c57e347c62731 (diff) | |
drm/i915/skl: Program PLL for edp1.4 intermediate frequencies
v2: Making the link_clock half in switch inline with the DPLL_CTRL1_* macros
(Ville)
Signed-off-by: Sonika Jindal <[email protected]>
Reviewed-by: Ville Syrjälä <[email protected]>
Signed-off-by: Daniel Vetter <[email protected]>
Diffstat (limited to 'tools/perf/scripts/python/failed-syscalls-by-pid.py')
0 files changed, 0 insertions, 0 deletions